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diff --git a/articles/2024-11-28-optimal-computer-part-1.md b/articles/2024-11-28-optimal-computer-part-1.md index ca67c98..9bbfb91 100644 --- a/articles/2024-11-28-optimal-computer-part-1.md +++ b/articles/2024-11-28-optimal-computer-part-1.md @@ -19,8 +19,9 @@ that these should be redesigned aswell. For my overview I will therefore start from the bottom. In the rest of this article I am also just writing what I think is true or close -to the truth even for topics where I know less. I expect some things to be -wrong. In that case, please tell me. +to the truth even for topics that I know less about. So view the text below as +pure speculation. I expect some things to be wrong. In that case, please tell +me. ## Content @@ -68,15 +69,16 @@ architectures appeals to me. It describes architectures where an instruction specifies the configuration of most (usually all) components of the processor at once. -Next I am describing my design: Firstly the processor is made up of a number of -_modules_ that have _inputs_, _outputs_ and _parameters_. These modules' inputs -are then connected with data multiplexers to allow abitrary cross-module data -flow. Parameters of modules are bits that configure the modules operating within -one clock cycle of the processor. These parameters also include an output index -for each input of the module to obtain the data for this cycle from. The -processor operates in clock cycles where each cycle a new instruction is loaded -and executed. This module system is very flexible; Here are a few examples of -useful modules for a processor: +[Skipping a few steps because its already 4 am...] Next I am describing my +design: Firstly the processor is made up of a number of _modules_ that have +_inputs_, _outputs_ and _parameters_. These modules' inputs are then connected +with data multiplexers to allow abitrary cross-module data flow. Parameters of +modules are bits that configure the modules operating within one clock cycle of +the processor. These parameters also include an output index for each input of +the module to obtain the data for this cycle from. The processor operates in +clock cycles where each cycle a new instruction is loaded and executed. This +module system is very flexible; Here are a few examples of useful modules for a +processor: - Add/Sub unit: Two inputs and one output. A flag to switch subtract mode. - Literal loader: One output set to a value set by 32 or so parameter bits. @@ -108,13 +110,17 @@ memory caching because of their runtime knowledge, that a compiler does not have. In general, writing a _good_ compiler for this architecture (assuming a traditional language) is relatively hard. +I am already visualizing code for such a processor in my head in a table with +time and module axis. For some later post or development I might generate such +diagrams from code to think about about. (will probably look super cool) + ## End Thats it for today. The writing of this article has been motivated by me "participating" in [Macoy Madson's Simple Useful System Challenge](https://macoy.me/blog/programming/SimpleUsefulSystem). As usual I am always happy to receive feedback about what I am writing here. -[Send mail!](mailto:metamuffin@disroot.org) +[Send your thoughts!](https://metamuffin.org/contact) (any method is fine) Next article will be more about my ideas about software. The overview is: |